ConOpSys V2970  P004.07
ANVILEX control operating system
P020_29_KG3_ENC.h
Go to the documentation of this file.
1 //------------------------------------------------------------------------------
2 //! @file P020_29_KG3_ENC.h
3 //! @brief KG3 encoder board P020.29 hardware driver header file.
4 //! @attention No special attention requered.
5 //! @copyright (C) 2015-2020 ANVILEX LLC
6 //! $HeadURL: https://192.168.3.4:8443/svn/P004_07/ConOpSys/Hardware/P020_29_KG3_ENC/P020_29_KG3_ENC.h $
7 //! $Revision: 2451 $
8 //! $Date: 2021-03-09 17:33:37 +0500 (Вт, 09 мар 2021) $
9 //! $Author: ggavrituhin $
10 //------------------------------------------------------------------------------
11 //
12 // Redistribution and use in source and binary forms, with or without
13 // modification, are permitted provided that the following conditions are met:
14 //
15 // 1. Redistributions of source code must retain the above copyright notice,
16 // this list of conditions and the following disclaimer.
17 //
18 // 2. Redistributions in binary form must reproduce the above copyright notice,
19 // this list of conditions and the following disclaimer in the documentation
20 // and/or other materials provided with the distribution.
21 //
22 // 3. Neither the name of ANVILEX nor the names of its contributors may be
23 // used to endorse or promote products derived from this software without
24 // specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
30 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 // POSSIBILITY OF SUCH DAMAGE.
37 //
38 //------------------------------------------------------------------------------
39 //
40 // TP020_29_KG3_ENC_T0
41 // Emulation of the DIO board.
42 //
43 // TP020_29_KG3_ENC_T1
44 //
45 //------------------------------------------------------------------------------
46 
47 //------------------------------------------------------------------------------
48 // Protecting header files from mutual, recursive inclusion.
49 //------------------------------------------------------------------------------
50 
51 #pragma once
52 
53 //------------------------------------------------------------------------------
54 // Include standard libraries header files
55 //------------------------------------------------------------------------------
56 
57 //------------------------------------------------------------------------------
58 // Include thrid party header files
59 //------------------------------------------------------------------------------
60 
61 //------------------------------------------------------------------------------
62 // Include ConOpSys header files
63 //------------------------------------------------------------------------------
64 
65 #include "Function_Block_Base.h"
66 
67 //------------------------------------------------------------------------------
68 // Include ConOpSys application header files
69 //------------------------------------------------------------------------------
70 
71 //------------------------------------------------------------------------------
72 // Macros
73 //------------------------------------------------------------------------------
74 
75 //------------------------------------------------------------------------------
76 
77 //! @brief KG3 digital I/O board (P020.29 / KG3 ENC T1) type 1 class
79 {
80 
81  //--------------------------------------------------------------------------
82  // Public defines, methods and variables
83  //--------------------------------------------------------------------------
84 
85  public:
86 
87  //------------------------------------------------------------------------
88  // Public defines
89  //------------------------------------------------------------------------
90 
91  //! @brief Register structure for digital I/O access
92  typedef struct
93  {
94 
95  //! @brief 0x00 : Module identification low register
97 
98  //! @brief 0x01 : Module identification high register
100 
101  //! @brief 0x02 : Control and status registers
102  union
103  {
104 
105  // 0x02 : RELAY_DATA_READ_REGISTER
106  // Bit 15 : Reserved
107  // Bit 14 : Reserved
108  // Bit 13 : Reserved
109  // Bit 12 : Reserved
110  // Bit 11 : Reserved
111  // Bit 10 : Channel Z direction
112  // Bit 9 : Channel Z output data
113  // Bit 8 : Channel Z input data
114  // Bit 7 : Reserved
115  // Bit 6 : Channel B direction
116  // Bit 5 : Channel B output data
117  // Bit 4 : Channel B input data
118  // Bit 3 : Reserved
119  // Bit 2 : Channel A direction
120  // Bit 1 : Channel A output data
121  // Bit 0 : Channel A input data
122  U16 u16_Relay_Data_Read_Register; //!< Offset 0x02, Data read redister
123 
124  // 0x02 : RELAY_DATA_WRITE_REGISTER
125  // Bit 15 : Reserved
126  // Bit 14 : Reserved
127  // Bit 13 : Reserved
128  // Bit 12 : Reserved
129  // Bit 11 : Reserved
130  // Bit 10 : Channel Z direction
131  // 0 - Select receive mode
132  // 1 - Select transmit mode
133  // Bit 9 : Channel Z output data
134  // 0 - Set channel output to logical '0'
135  // 1 - Set channel output to logical '1'
136  // Bit 8 : Reserved
137  // Bit 7 : Reserved
138  // Bit 6 : Channel B direction
139  // 0 - Select receive mode
140  // 1 - Select transmit mode
141  // Bit 5 : Channel B output data
142  // 0 - Set channel output to logical '0'
143  // 1 - Set channel output to logical '1'
144  // Bit 4 : Reserved
145  // Bit 3 : Reserved
146  // Bit 2 : Channel A direction
147  // 0 - Select receive mode
148  // 1 - Select transmit mode
149  // Bit 1 : Channel A output data
150  // 0 - Set channel output to logical '0'
151  // 1 - Set channel output to logical '1'
152  // Bit 0 : Reserved
153  U16 u16_Relay_Data_Write_Register; //!< Offset 0x02, Data write redister
154  };
155 
156  //! @brief 0x03 : Relay data set register
157  // Bit 15 : Reserved
158  // Bit 14 : Reserved
159  // Bit 13 : Reserved
160  // Bit 12 : Reserved
161  // Bit 11 : Reserved
162  // Bit 10 : Channel Z direction
163  // 0 - No action
164  // 1 - Select transmit mode
165  // Bit 9 : Channel Z output data
166  // 0 - No action
167  // 1 - Set channel output to logical '1'
168  // Bit 8 : Reserved
169  // Bit 7 : Reserved
170  // Bit 6 : Channel B direction
171  // 0 - No action
172  // 1 - Select transmit mode
173  // Bit 5 : Channel B output data
174  // 0 - No action
175  // 1 - Set channel output to logical '1'
176  // Bit 4 : Reserved
177  // Bit 3 : Reserved
178  // Bit 2 : Channel A direction
179  // 0 - No action
180  // 1 - Select transmit mode
181  // Bit 1 : Channel A output data
182  // 0 - No action
183  // 1 - Set channel output to logical '1'
184  // Bit 0 : Reserved
186 
187  //! @brief 0x04 : Relay data clear register
188  // Bit 15 : Reserved
189  // Bit 14 : Reserved
190  // Bit 13 : Reserved
191  // Bit 12 : Reserved
192  // Bit 11 : Reserved
193  // Bit 10 : Channel Z direction
194  // 0 - No action
195  // 1 - Select receive mode
196  // Bit 9 : Channel Z output data
197  // 0 - No action
198  // 1 - Set channel output to logical '0'
199  // Bit 8 : Reserved
200  // Bit 7 : Reserved
201  // Bit 6 : Channel B direction
202  // 0 - No action
203  // 1 - Select receive mode
204  // Bit 5 : Channel B output data
205  // 0 - No action
206  // 1 - Set channel output to logical '0'
207  // Bit 4 : Reserved
208  // Bit 3 : Reserved
209  // Bit 2 : Channel A direction
210  // 0 - No action
211  // 1 - Select receive mode
212  // Bit 1 : Channel A output data
213  // 0 - No action
214  // 1 - Set channel output to logical '0'
215  // Bit 0 : Reserved
217 
218  //! @brief 0x05 : Relay data toggle register
219  // Bit 15 : Reserved
220  // Bit 14 : Reserved
221  // Bit 13 : Reserved
222  // Bit 12 : Reserved
223  // Bit 11 : Reserved
224  // Bit 10 : Channel Z direction
225  // 0 - No action
226  // 1 - Togle between receive and transmit mode
227  // Bit 9 : Channel Z output data
228  // 0 - No action
229  // 1 - Toggle channel output between logical '0' and '1'
230  // Bit 8 : Reserved
231  // Bit 7 : Reserved
232  // Bit 6 : Channel B direction
233  // 0 - No action
234  // 1 - Toggle between receive and transmit mode
235  // Bit 5 : Channel B output data
236  // 0 - No action
237  // 1 - Toggle channel output between logical '0' and '1'
238  // Bit 4 : Reserved
239  // Bit 3 : Reserved
240  // Bit 2 : Channel A direction
241  // 0 - No action
242  // 1 - Toggle between receive and transmit mode
243  // Bit 1 : Channel A output data
244  // 0 - No action
245  // 1 - Toggle channel output between logical '0' and '1'
246  // Bit 0 : Reserved
248 
249  //! @brief 0x06 : Reserved
251 
252  //! @brief 0x07 : Reserved
254 
255  //! @brief 0x08 : Reserved
257 
258  //! @brief 0x09 : Reserved
260 
261  //! @brief 0x0A : Reserved
263 
264  //! @brief 0x0B : Reserved
266 
267  //! @brief 0x0C : Reserved
269 
270  //! @brief 0x0D : Reserved
272 
273  //! @brief 0x0E : Reserved
275 
276  //! @brief 0x0F : Reserved
278 
280 
281  //--------------------------------------------------------------------------
282  // Public methods
283  //--------------------------------------------------------------------------
284 
285  //!-------------------------------------------------------------------------
286  //! @brief Function block class constructor method.
287  //! @note None
288  //! \par Override
289  //! Not allowed
290  //! @attention Don't call this method directly.
291  //--------------------------------------------------------------------------
292 
294 
295  //!-------------------------------------------------------------------------
296  //! @brief Function block class destructor method.
297  //! @note None
298  //! \par Override
299  //! Not allowed
300  //! @attention Don't call this method directly.
301  //--------------------------------------------------------------------------
302 
303  virtual ~TP020_29_KG3_ENC_T1();
304 
305  //!-------------------------------------------------------------------------
306  //! @brief Hardware mapping method.
307  //! @note None
308  //! @param [in] *struct_Registers_Base_Address - Base adress to register structure mapping
309  //! \par Override
310  //! Not allowed
311  //! @attention None
312  //--------------------------------------------------------------------------
313 
314  VOID Map( TP020_29_KG3_ENC_Registers *struct_Registers_Base_Address );
315 
316  //!-------------------------------------------------------------------------
317  //! @brief Function block initialisation method.
318  //! @note None
319  //! \par Override
320  //! Not allowed
321  //! @attention None
322  //--------------------------------------------------------------------------
323 
324  virtual VOID Init();
325 
326  //!-------------------------------------------------------------------------
327  //! @brief Function block execution method.
328  //! @note None
329  //! \par Override
330  //! Not allowed
331  //! @attention None
332  //--------------------------------------------------------------------------
333 
334  virtual VOID Execute();
335 
336  //--------------------------------------------------------------------------
337  // Deprecated
338  //--------------------------------------------------------------------------
339 
341 
342  //--------------------------------------------------------------------------
343  // Deprecated
344  //--------------------------------------------------------------------------
345 
347 
348  //--------------------------------------------------------------------------
349  // ??? ==> ANVILEX KM: Move to the hardware class
350  //--------------------------------------------------------------------------
351 
352  U32 Get_Module_ID();
353 
354  //!-------------------------------------------------------------------------
355  //! @brief Send information about digital I/O baortd driver over communication link protocol
356  //! @note This method sends information about digital I/O driver over specified communication link protocol.
357  //! @param [in] *object_Protocol - Pointer to the communication link protocol
358  //! @return None
359  //! \par Override
360  //! Not allowed
361  //! @attention None
362  //--------------------------------------------------------------------------
363 
364  virtual VOID Send_Information( TProtocol_Base *object_Protocol );
365 
366  //--------------------------------------------------------------------------
367  // Public variables
368  //--------------------------------------------------------------------------
369 
370  //--------------------------------------------------------------------------
371  // Parameters
372  //--------------------------------------------------------------------------
373 
374  //--------------------------------------------------------------------------
375  // Input signal connectors
376  //--------------------------------------------------------------------------
377 
378  //! @brief Digital output 1 for channel A
380 
381  //! @brief Digital output for channel B
383 
384  //! @brief Digital output for channel Z
386 
387  //--------------------------------------------------------------------------
388  // Output signal connectorss
389  //--------------------------------------------------------------------------
390 
391  //----------------------------------------------------------------------------
392  // Protected defines, mathods and variables
393  //----------------------------------------------------------------------------
394 
395  protected:
396 
397  //----------------------------------------------------------------------------
398  // Private defines, mathods and variables
399  //----------------------------------------------------------------------------
400 
401  private:
402 
403  //--------------------------------------------------------------------------
404  // Private defines
405  //--------------------------------------------------------------------------
406 
407  //! @brief Structure for bit parsing
408  typedef union
409  {
410 
411  //! @brief Raw data
413 
414  //! @brief Structure of the bits
415  struct
416  {
417 
418  //! @brief Bit 0, Reserved
419  U16 :1;
420 
421  //! @brief Bit 1, Channel A data
423 
424  //! @brief Bit 2, Channel 3 direction
426 
427  //! @brief Bit 3, Channel 4
428  U16 :1;
429 
430  //! @brief Bit 4, Channel 5
431  U16 :1;
432 
433  //! @brief Bit 5, Channel B data
435 
436  //! @brief Bit 6, Channel B direction
438 
439  //! @brief Bit 7, Channel 8
440  U16 :1;
441 
442  //! @brief Bit 8, Channel 8
443  U16 :1;
444 
445  //! @brief Bit 9, Channel Z data
447 
448  //! @brief Bit 10, Channel Z direction
450 
451  //! @brief Bits 11..15, unused bits
452  U16 :5;
453 
454  };
455 
456  } TEncoder_Data;
457 
458 
459  //--------------------------------------------------------------------------
460  // Private variables
461  //--------------------------------------------------------------------------
462 
463  //! @brief Pointer to the memory area in FPGA address space
465 
466 };
467 
468 //------------------------------------------------------------------------------
469 
470 //! @brief KG3 digital I/O board (P020.29 / KG3 ENC T2) type 2 class
472 {
473 
474  //----------------------------------------------------------------------------
475  // Public methods and variables
476  //----------------------------------------------------------------------------
477 
478  public:
479 
480  // Register structure for generic access
481  typedef struct
482  {
483 
484  // Analog value registers
485  U16 u16_Status; //!< Status register
486  U16 u16_Counter; //!< Counter register
487  U16 u16_Counter_Latch; //!< Counter latch register
488  U16 u16_Period; //!< Period in FPGA clocks
489  U16 u16_Unused_0x04; //!< Reserved register
490  U16 u16_Unused_0x05; //!< Reserved register
491  U16 u16_Unused_0x06; //!< Reserved register
492  U16 u16_Unused_0x07; //!< Reserved register
493 
495 
496 
497 
498  //--------------------------------------------------------------------------
499  // Public methods
500  //--------------------------------------------------------------------------
501 
502  // Constructor and destructor
503  TP020_29_KG3_ENC_T2(); //!< Constructor method
504  virtual ~TP020_29_KG3_ENC_T2(); //!< Destructor method
505 
506  VOID Map( TP020_29_KG3_ENC_Registers *struct_Registers_Base_Address );
507  virtual VOID Init(); //!< Initialisation method
508  virtual VOID Execute(); //!< Execute method
509  U32 Get_Module_ID();
510  virtual VOID Send_Information( TProtocol_Base *object_Protocol ); //!< Send information about functional block
511 
512  //--------------------------------------------------------------------------
513  // Block inputs
514  //--------------------------------------------------------------------------
515 
516  TBlock_Input_Connector object_u32_Pulse; //!< [-] Encoder pulse per revolution
518 // TBlock_Input_Connector object_f32_Theta_Offset;
519  TBlock_Input_Connector object_f32_Max_Omega_Change_Rate; //!< [rad/s] Maximal omega change rate
520 
521  //--------------------------------------------------------------------------
522  // Block outputs
523  //--------------------------------------------------------------------------
524 
526 
528  TBlock_Output_Connector object_f32_Omega; //!< [rad/s] Rotor speed
530 
531  //----------------------------------------------------------------------------
532  // Protected methods and variables
533  //----------------------------------------------------------------------------
534 
535  protected:
536 
537  //----------------------------------------------------------------------------
538  // Private methods and variables
539  //----------------------------------------------------------------------------
540 
541  private:
542 
543  volatile TP020_29_KG3_ENC_Registers *struct_Registers = (TP020_29_KG3_ENC_Registers*)NULL; //!< Hardware mapped registers
544 
545  U32 u32_Error_Counter = (U32)0; //!< Error counter
546 
547  F32 f32_Theta_Gain = (F32)0.0f; //!< Internal variable
548  F32 f32_Omega_Gain = (F32)0.0f; //!< Internal variable
549  F32 f32_Omega_Magnitude_Storage = (F32)0.0f; //!< Omega magnitude storage
550  F32 f32_Max_Omega_Change_Rate = (F32)0.0f; //!< Maximal omega change rate
551 
552  BOOL bool_First_Iteration = (BOOL)true; //!< First iteration flag
553 
554  #ifdef FUNCTIONAL_BLOCK_CREATE_DIAGNOSE_OUTPUTS
555  U16 u16_Status = (U16)0x0000; //!< Quadrature encoder status
556  U16 u16_Counter = (U16)0x0000; //!< Quadrature counter
557  U16 u16_Period = (U16)0x0000; //!< Rotation period in FPGA clocks
558  #endif
559 
560 };
561 
562 //------------------------------------------------------------------------------
563 // End of file
564 //------------------------------------------------------------------------------
int BOOL
Boolean datatype definition.
Definition: Defines.h:124
#define NULL
Definition: Defines.h:388
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
unsigned long U32
Binary 32-Bit unsigned integer datatype defenition.
Definition: Defines.h:203
float F32
IEEE-754 32-Bit single presession floating point numbers datatype defenition.
Definition: Defines.h:324
unsigned short U16
Binary 16-Bit unsigned integer datatype defenition.
Definition: Defines.h:193
Function block base class header file.
Function block input connector class.
Definition: Block_Input_Connector.h:83
Function block output connector class.
Definition: Block_Output_Connector.h:59
Function block base class for device.
Definition: Function_Block_Base.h:96
KG3 digital I/O board (P020.29 / KG3 ENC T1) type 1 class.
Definition: P020_29_KG3_ENC.h:79
TBlock_Input_Connector object_bool_Channel_A_Data
Digital output 1 for channel A.
Definition: P020_29_KG3_ENC.h:379
virtual VOID Send_Information(TProtocol_Base *object_Protocol)
Send information about digital I/O baortd driver over communication link protocol.
Definition: P020_29_KG3_ENC.cpp:182
virtual ~TP020_29_KG3_ENC_T1()
Function block class destructor method.
Definition: P020_29_KG3_ENC.cpp:93
VOID Map(TP020_29_KG3_ENC_Registers *struct_Registers_Base_Address)
Hardware mapping method.
Definition: P020_29_KG3_ENC.cpp:101
TBlock_Input_Connector object_bool_Channel_Z_Data
Digital output for channel Z.
Definition: P020_29_KG3_ENC.h:385
virtual VOID Execute()
Function block execution method.
Definition: P020_29_KG3_ENC.cpp:147
TP020_29_KG3_ENC_T1()
Function block class constructor method.
Definition: P020_29_KG3_ENC.cpp:68
TBlock_Input_Connector object_bool_Channel_B_Data
Digital output for channel B.
Definition: P020_29_KG3_ENC.h:382
U32 Get_Module_ID()
Definition: P020_29_KG3_ENC.cpp:167
volatile TP020_29_KG3_ENC_Registers * struct_Registers
Pointer to the memory area in FPGA address space.
Definition: P020_29_KG3_ENC.h:464
virtual VOID Init()
Function block initialisation method.
Definition: P020_29_KG3_ENC.cpp:116
KG3 digital I/O board (P020.29 / KG3 ENC T2) type 2 class.
Definition: P020_29_KG3_ENC.h:472
F32 f32_Theta_Gain
Internal variable.
Definition: P020_29_KG3_ENC.h:547
F32 f32_Max_Omega_Change_Rate
Maximal omega change rate.
Definition: P020_29_KG3_ENC.h:550
virtual VOID Execute()
Execute method.
Definition: P020_29_KG3_ENC.cpp:308
TP020_29_KG3_ENC_T2()
Constructor method.
Definition: P020_29_KG3_ENC.cpp:229
TBlock_Input_Connector object_f32_Counter_Clock_Frequency
[Hz] Counter clock frequency
Definition: P020_29_KG3_ENC.h:517
U32 u32_Error_Counter
Error counter.
Definition: P020_29_KG3_ENC.h:545
TBlock_Output_Connector object_f32_Theta
[rad] Rotor theta
Definition: P020_29_KG3_ENC.h:527
virtual VOID Init()
Initialisation method.
Definition: P020_29_KG3_ENC.cpp:277
virtual ~TP020_29_KG3_ENC_T2()
Destructor method.
Definition: P020_29_KG3_ENC.cpp:254
TBlock_Output_Connector object_f32_Omega
[rad/s] Rotor speed
Definition: P020_29_KG3_ENC.h:528
TBlock_Output_Connector object_bool_Error
Error flag.
Definition: P020_29_KG3_ENC.h:529
TBlock_Input_Connector object_u32_Pulse
[-] Encoder pulse per revolution
Definition: P020_29_KG3_ENC.h:516
TBlock_Output_Connector object_f32_Counter
Encoder counter.
Definition: P020_29_KG3_ENC.h:525
F32 f32_Omega_Magnitude_Storage
Omega magnitude storage.
Definition: P020_29_KG3_ENC.h:549
BOOL bool_First_Iteration
First iteration flag.
Definition: P020_29_KG3_ENC.h:552
TBlock_Input_Connector object_f32_Max_Omega_Change_Rate
[rad/s] Maximal omega change rate
Definition: P020_29_KG3_ENC.h:519
virtual VOID Send_Information(TProtocol_Base *object_Protocol)
Send information about functional block.
Definition: P020_29_KG3_ENC.cpp:344
volatile TP020_29_KG3_ENC_Registers * struct_Registers
Hardware mapped registers.
Definition: P020_29_KG3_ENC.h:543
F32 f32_Omega_Gain
Internal variable.
Definition: P020_29_KG3_ENC.h:548
U32 Get_Module_ID()
Definition: P020_29_KG3_ENC.cpp:328
VOID Map(TP020_29_KG3_ENC_Registers *struct_Registers_Base_Address)
Definition: P020_29_KG3_ENC.cpp:262
Definition: Protocol_Base.h:57
Register structure for digital I/O access.
Definition: P020_29_KG3_ENC.h:93
U16 u16_Unit_ID_L
0x00 : Module identification low register
Definition: P020_29_KG3_ENC.h:96
U16 u16_Reserve_9
0x09 : Reserved
Definition: P020_29_KG3_ENC.h:259
U16 u16_Reserve_14
0x0E : Reserved
Definition: P020_29_KG3_ENC.h:274
U16 u16_Reserve_7
0x07 : Reserved
Definition: P020_29_KG3_ENC.h:253
U16 u16_Unit_ID_H
0x01 : Module identification high register
Definition: P020_29_KG3_ENC.h:99
U16 u16_Reserve_8
0x08 : Reserved
Definition: P020_29_KG3_ENC.h:256
U16 u16_Reserve_15
0x0F : Reserved
Definition: P020_29_KG3_ENC.h:277
U16 u16_Relay_Data_Write_Register
Offset 0x02, Data write redister.
Definition: P020_29_KG3_ENC.h:153
U16 u16_Reserve_10
0x0A : Reserved
Definition: P020_29_KG3_ENC.h:262
U16 u16_Reserve_12
0x0C : Reserved
Definition: P020_29_KG3_ENC.h:268
U16 u16_Relay_Data_Read_Register
Offset 0x02, Data read redister.
Definition: P020_29_KG3_ENC.h:122
U16 u16_Reserve_13
0x0D : Reserved
Definition: P020_29_KG3_ENC.h:271
U16 u16_Relay_Data_Clear_Register
0x04 : Relay data clear register
Definition: P020_29_KG3_ENC.h:216
U16 u16_Reserve_11
0x0B : Reserved
Definition: P020_29_KG3_ENC.h:265
U16 u16_Relay_Data_Toggle_Register
0x05 : Relay data toggle register
Definition: P020_29_KG3_ENC.h:247
U16 u16_Reserve_6
0x06 : Reserved
Definition: P020_29_KG3_ENC.h:250
U16 u16_Relay_Data_Set_Register
0x03 : Relay data set register
Definition: P020_29_KG3_ENC.h:185
Definition: P020_29_KG3_ENC.h:482
U16 u16_Counter_Latch
Counter latch register.
Definition: P020_29_KG3_ENC.h:487
U16 u16_Unused_0x07
Reserved register.
Definition: P020_29_KG3_ENC.h:492
U16 u16_Counter
Counter register.
Definition: P020_29_KG3_ENC.h:486
U16 u16_Period
Period in FPGA clocks.
Definition: P020_29_KG3_ENC.h:488
U16 u16_Unused_0x06
Reserved register.
Definition: P020_29_KG3_ENC.h:491
U16 u16_Unused_0x05
Reserved register.
Definition: P020_29_KG3_ENC.h:490
U16 u16_Unused_0x04
Reserved register.
Definition: P020_29_KG3_ENC.h:489
U16 u16_Status
Status register.
Definition: P020_29_KG3_ENC.h:485
U16 bool_Channel_A_Direction
Bit 2, Channel 3 direction.
Definition: P020_29_KG3_ENC.h:425
U16 u16_Raw_Data
Raw data.
Definition: P020_29_KG3_ENC.h:412
U16 bool_Channel_A_Output
Bit 1, Channel A data.
Definition: P020_29_KG3_ENC.h:422
U16 bool_Channel_B_Direction
Bit 6, Channel B direction.
Definition: P020_29_KG3_ENC.h:437
U16 bool_Channel_Z_Output
Bit 9, Channel Z data.
Definition: P020_29_KG3_ENC.h:446
U16 bool_Channel_B_Output
Bit 5, Channel B data.
Definition: P020_29_KG3_ENC.h:434
U16 bool_Channel_Z_Direction
Bit 10, Channel Z direction.
Definition: P020_29_KG3_ENC.h:449