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    ConOpSys V2970
    P004.07
    
   ANVILEX control operating system 
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KG3 RTD input board P017.41 hardware driver implementation file. More...

KG3 RTD input board P017.41 hardware driver implementation file.
| #define RTD_CHANNEL_1_CONFIGURATION_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_1_FAULT_RESET_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_1_READ_CONFIGURATION ((U16)0x4000) | 
| #define RTD_CHANNEL_1_READ_FAULT_STATUS ((U16)0x4007) | 
| #define RTD_CHANNEL_1_READ_HIGH_FAULT_THRESHOLD ((U16)0x0003) | 
| #define RTD_CHANNEL_1_READ_HIGH_FAULT_THRESHOLD_LSB ((U16)0x4004) | 
| #define RTD_CHANNEL_1_READ_HIGH_FAULT_THRESHOLD_MSB ((U16)0x4003) | 
| #define RTD_CHANNEL_1_READ_LOW_FAULT_THRESHOLD ((U16)0x0005) | 
| #define RTD_CHANNEL_1_READ_LOW_FAULT_THRESHOLD_LSB ((U16)0x4006) | 
| #define RTD_CHANNEL_1_READ_LOW_FAULT_THRESHOLD_MSB ((U16)0x4005) | 
| #define RTD_CHANNEL_1_READ_TEMPERATURE ((U16)0x0001) | 
| #define RTD_CHANNEL_1_READ_TEMPERATURE_LSB ((U16)0x4002) | 
| #define RTD_CHANNEL_1_READ_TEMPERATURE_MSB ((U16)0x4001) | 
| #define RTD_CHANNEL_1_WRITE_CONFIGURATION ((U16)0xC000) | 
| #define RTD_CHANNEL_1_WRITE_HIGH_FAULT_THRESHOLD ((U16)0x8003) | 
| #define RTD_CHANNEL_1_WRITE_HIGH_FAULT_THRESHOLD_LSB ((U16)0xC004) | 
| #define RTD_CHANNEL_1_WRITE_HIGH_FAULT_THRESHOLD_MSB ((U16)0xC003) | 
| #define RTD_CHANNEL_1_WRITE_LOW_FAULT_THRESHOLD ((U16)0x8005) | 
| #define RTD_CHANNEL_1_WRITE_LOW_FAULT_THRESHOLD_LSB ((U16)0xC006) | 
| #define RTD_CHANNEL_1_WRITE_LOW_FAULT_THRESHOLD_MSB ((U16)0xC005) | 
| #define RTD_CHANNEL_2_CONFIGURATION_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_2_FAULT_RESET_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_2_READ_CONFIGURATION ((U16)0x4008) | 
| #define RTD_CHANNEL_2_READ_FAULT_STATUS ((U16)0x400F) | 
| #define RTD_CHANNEL_2_READ_HIGH_FAULT_THRESHOLD ((U16)0x000B) | 
| #define RTD_CHANNEL_2_READ_HIGH_FAULT_THRESHOLD_LSB ((U16)0x400C) | 
| #define RTD_CHANNEL_2_READ_HIGH_FAULT_THRESHOLD_MSB ((U16)0x400B) | 
| #define RTD_CHANNEL_2_READ_LOW_FAULT_THRESHOLD ((U16)0x000D) | 
| #define RTD_CHANNEL_2_READ_LOW_FAULT_THRESHOLD_LSB ((U16)0x400E) | 
| #define RTD_CHANNEL_2_READ_LOW_FAULT_THRESHOLD_MSB ((U16)0x400D) | 
| #define RTD_CHANNEL_2_READ_TEMPERATURE ((U16)0x0009) | 
| #define RTD_CHANNEL_2_READ_TEMPERATURE_LSB ((U16)0x400A) | 
| #define RTD_CHANNEL_2_READ_TEMPERATURE_MSB ((U16)0x4009) | 
| #define RTD_CHANNEL_2_WRITE_CONFIGURATION ((U16)0xC008) | 
| #define RTD_CHANNEL_2_WRITE_HIGH_FAULT_THRESHOLD ((U16)0x800B) | 
| #define RTD_CHANNEL_2_WRITE_HIGH_FAULT_THRESHOLD_LSB ((U16)0xC00C) | 
| #define RTD_CHANNEL_2_WRITE_HIGH_FAULT_THRESHOLD_MSB ((U16)0xC00B) | 
| #define RTD_CHANNEL_2_WRITE_LOW_FAULT_THRESHOLD ((U16)0x800D) | 
| #define RTD_CHANNEL_2_WRITE_LOW_FAULT_THRESHOLD_LSB ((U16)0xC00E) | 
| #define RTD_CHANNEL_2_WRITE_LOW_FAULT_THRESHOLD_MSB ((U16)0xC00D) | 
| #define RTD_CHANNEL_3_CONFIGURATION_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_3_FAULT_RESET_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_3_READ_CONFIGURATION ((U16)0x4010) | 
| #define RTD_CHANNEL_3_READ_FAULT_STATUS ((U16)0x4017) | 
| #define RTD_CHANNEL_3_READ_HIGH_FAULT_THRESHOLD ((U16)0x0013) | 
| #define RTD_CHANNEL_3_READ_HIGH_FAULT_THRESHOLD_LSB ((U16)0x4014) | 
| #define RTD_CHANNEL_3_READ_HIGH_FAULT_THRESHOLD_MSB ((U16)0x4013) | 
| #define RTD_CHANNEL_3_READ_LOW_FAULT_THRESHOLD ((U16)0x0015) | 
| #define RTD_CHANNEL_3_READ_LOW_FAULT_THRESHOLD_LSB ((U16)0x4016) | 
| #define RTD_CHANNEL_3_READ_LOW_FAULT_THRESHOLD_MSB ((U16)0x4015) | 
| #define RTD_CHANNEL_3_READ_TEMPERATURE ((U16)0x0011) | 
| #define RTD_CHANNEL_3_READ_TEMPERATURE_LSB ((U16)0x4012) | 
| #define RTD_CHANNEL_3_READ_TEMPERATURE_MSB ((U16)0x4011) | 
| #define RTD_CHANNEL_3_WRITE_CONFIGURATION ((U16)0xC010) | 
| #define RTD_CHANNEL_3_WRITE_HIGH_FAULT_THRESHOLD ((U16)0x8013) | 
| #define RTD_CHANNEL_3_WRITE_HIGH_FAULT_THRESHOLD_LSB ((U16)0xC014) | 
| #define RTD_CHANNEL_3_WRITE_HIGH_FAULT_THRESHOLD_MSB ((U16)0xC013) | 
| #define RTD_CHANNEL_3_WRITE_LOW_FAULT_THRESHOLD ((U16)0x8015) | 
| #define RTD_CHANNEL_3_WRITE_LOW_FAULT_THRESHOLD_LSB ((U16)0xC016) | 
| #define RTD_CHANNEL_3_WRITE_LOW_FAULT_THRESHOLD_MSB ((U16)0xC015) | 
| #define RTD_CHANNEL_4_CONFIGURATION_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_4_FAULT_RESET_WORD ((U16)0x00C3) | 
| #define RTD_CHANNEL_4_READ_CONFIGURATION ((U16)0x4018) | 
| #define RTD_CHANNEL_4_READ_FAULT_STATUS ((U16)0x401F) | 
| #define RTD_CHANNEL_4_READ_HIGH_FAULT_THRESHOLD ((U16)0x001B) | 
| #define RTD_CHANNEL_4_READ_HIGH_FAULT_THRESHOLD_LSB ((U16)0x401C) | 
| #define RTD_CHANNEL_4_READ_HIGH_FAULT_THRESHOLD_MSB ((U16)0x401B) | 
| #define RTD_CHANNEL_4_READ_LOW_FAULT_THRESHOLD ((U16)0x001D) | 
| #define RTD_CHANNEL_4_READ_LOW_FAULT_THRESHOLD_LSB ((U16)0x401E) | 
| #define RTD_CHANNEL_4_READ_LOW_FAULT_THRESHOLD_MSB ((U16)0x401D) | 
| #define RTD_CHANNEL_4_READ_TEMPERATURE ((U16)0x0019) | 
| #define RTD_CHANNEL_4_READ_TEMPERATURE_LSB ((U16)0x401A) | 
| #define RTD_CHANNEL_4_READ_TEMPERATURE_MSB ((U16)0x4019) | 
| #define RTD_CHANNEL_4_WRITE_CONFIGURATION ((U16)0xC018) | 
| #define RTD_CHANNEL_4_WRITE_HIGH_FAULT_THRESHOLD ((U16)0x801B) | 
| #define RTD_CHANNEL_4_WRITE_HIGH_FAULT_THRESHOLD_LSB ((U16)0xC01C) | 
| #define RTD_CHANNEL_4_WRITE_HIGH_FAULT_THRESHOLD_MSB ((U16)0xC01B) | 
| #define RTD_CHANNEL_4_WRITE_LOW_FAULT_THRESHOLD ((U16)0x801D) | 
| #define RTD_CHANNEL_4_WRITE_LOW_FAULT_THRESHOLD_LSB ((U16)0xC01E) | 
| #define RTD_CHANNEL_4_WRITE_LOW_FAULT_THRESHOLD_MSB ((U16)0xC01D) | 
| #define RTD_STATUS_REGISTER_READY_BIT ((U16)0x2000) |