| Assign_SPI_Master(TSPI_Master_Base *object_New_SPI_Master) | TSPI_Memory_Base | |
| bool_Device_ID_Available | TSPI_Memory_Base | protected |
| bool_Manufacturer_ID_Available | TSPI_Memory_Base | protected |
| bool_Serial_Number_Available | TSPI_Memory_Base | protected |
| Done() | TSPI_Memory_Base | |
| Erase_Chip(BOOL bool_Force_Bad_Block_Erase) | TSPI_Memory_Base | virtual |
| Extract_Page_Relative_Address(U32 u32_Linear_Address, U16 *u16_Relative_Address) | TSPI_Memory_Base | protected |
| Get_Block_Address(U16 u16_Block_Index, U32 *u32_Linear_Address) | TSPI_Memory_Base | |
| Get_Block_Count(U16 *u16_Block_Count) | TSPI_Memory_Base | |
| Get_Block_Index_By_Page(U32 u32_Page_Index, U16 *u16_Block_Index) | TSPI_Memory_Base | |
| Get_Block_Size(U32 *u32_Block_Size) | TSPI_Memory_Base | protected |
| Get_Capacity() | TSPI_Memory_Base | |
| Get_Chip_Size(U32 *u32_Chip_Size) | TSPI_Memory_Base | protected |
| Get_Page_Address(U16 u16_Block_Index, U16 u16_Relative_Page_Index, U32 *u32_Linear_Address) | TSPI_Memory_Base | |
| Get_Page_Index(U32 u32_Linear_Address, U32 *u32_Page_Index) | TSPI_Memory_Base | |
| Get_Page_Index(U16 u16_Block_Index, U16 u16_Page_Relative_Index, U32 *u32_Page_Index) | TSPI_Memory_Base | |
| Get_Page_Index(U16 u16_Block_Index, U32 *u32_Page_Index) | TSPI_Memory_Base | |
| Get_Page_Size(U16 *u16_Page_Size) | TSPI_Memory_Base | |
| Get_Pages_Per_Block_Count(U16 *u16_Pages_Per_Block) | TSPI_Memory_Base | |
| Get_Pages_Per_Chip_Count(U32 *u32_Pages_Per_Chip) | TSPI_Memory_Base | |
| Init() | TSPI_Memory_Base | |
| Is_Available() | TSPI_Memory_Base | |
| Is_Block_Index_In_Range(U16 u16_Block_Index) | TSPI_Memory_Base | protected |
| Is_Page_Index_In_Range(U32 u32_Page_Index) | TSPI_Memory_Base | protected |
| Is_Page_Relative_Index_In_Range(U16 u16_Page_Relative_Index) | TSPI_Memory_Base | private |
| object_SPI_Master | TSPI_Memory_Base | protected |
| Read_Buffer(U32 u32_Linear_Address, U32 u32_Size, U8 *u8_Data_Buffer)=0 | TSPI_Memory_Base | pure virtual |
| Read_Identification()=0 | TSPI_Memory_Base | privatepure virtual |
| Read_Memory(U32 u32_Address, U8 *u8_Data) | TSPI_Memory_Base | privatevirtual |
| Read_Status_Register(U8 *u8_StatusRegister) | TSPI_Memory_Base | privatevirtual |
| Send_Information(TProtocol_Base *object_Protocol) | TSPI_Memory_Base | virtual |
| Start() | TSPI_Memory_Base | virtual |
| Stop() | TSPI_Memory_Base | virtual |
| struct_Memory_Chip_Descriptor | TSPI_Memory_Base | protected |
| tril_Available | TSPI_Memory_Base | protected |
| TSPI_Memory_Base() | TSPI_Memory_Base | |
| u32_Capacity | TSPI_Memory_Base | protected |
| Unassign_SPI_Master() | TSPI_Memory_Base | |
| Verify_Buffer(U32 u32_Linear_Address, U32 u32_Size, U8 *u8_Data_Buffer) | TSPI_Memory_Base | virtual |
| Write_Buffer(U32 u32_Linear_Address, U32 u32_Size, U8 *u8_Data_Buffer)=0 | TSPI_Memory_Base | pure virtual |
| Write_Disable() | TSPI_Memory_Base | privatevirtual |
| Write_Enable() | TSPI_Memory_Base | privatevirtual |
| Write_Memory(U32 u32_Address, U8 u8_Data) | TSPI_Memory_Base | privatevirtual |
| Write_Status_Register(U8 u8_StatusRegister) | TSPI_Memory_Base | privatevirtual |
| ~TSPI_Memory_Base() | TSPI_Memory_Base | virtual |
