ConOpSys V2970  P004.07
ANVILEX control operating system
SPI5_P015_27_V1_0_CB.h
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1 //------------------------------------------------------------------------------
2 //! @file SPI5_P015_27_V1_0_CB.h
3 //! @brief Control board P015.27 CB STM32F429 on-chip SPI5 hardware driver header file.
4 //! @attention No special attention requered.
5 //! @copyright (C) 2015-2020 ANVILEX LLC
6 //! $HeadURL: https://192.168.3.4:8443/svn/P004_07/ConOpSys/Hardware/P015_09_V1_0/CAN1_P015_09_CB.h $
7 //! $Revision: 2262 $
8 //! $Date: 2020-12-05 07:20:48 +0500 (Sa, 05 Dez 2020) $
9 //! $Author: minch $
10 //------------------------------------------------------------------------------
11 //
12 // Redistribution and use in source and binary forms, with or without
13 // modification, are permitted provided that the following conditions are met:
14 //
15 // 1. Redistributions of source code must retain the above copyright notice,
16 // this list of conditions and the following disclaimer.
17 //
18 // 2. Redistributions in binary form must reproduce the above copyright notice,
19 // this list of conditions and the following disclaimer in the documentation
20 // and/or other materials provided with the distribution.
21 //
22 // 3. Neither the name of ANVILEX nor the names of its contributors may be
23 // used to endorse or promote products derived from this software without
24 // specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
30 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 // POSSIBILITY OF SUCH DAMAGE.
37 //
38 //------------------------------------------------------------------------------
39 
40 //------------------------------------------------------------------------------
41 // Protecting header files from mutual, recursive inclusion.
42 //------------------------------------------------------------------------------
43 
44 #pragma once
45 
46 //------------------------------------------------------------------------------
47 // Include project files
48 //------------------------------------------------------------------------------
49 
50 #include "SPI5_STM32F429.h"
51 
52 //------------------------------------------------------------------------------
53 
54 //! @brief On chip SPI5 bus master unit class
56 {
57 
58  //----------------------------------------------------------------------------
59  // Public defines, methods and variables
60  //----------------------------------------------------------------------------
61 
62  public:
63 
64  //!-------------------------------------------------------------------------
65  //! @brief Class constructor method
66  //! @note None
67  //! \par Override
68  //! Not allowed
69  //! @attention Don't call this method directly.
70  //--------------------------------------------------------------------------
71 
73 
74  //!-------------------------------------------------------------------------
75  //! @brief Class destructor method
76  //! @note None
77  //! \par Override
78  //! Not allowed
79  //! @attention Don't call this method directly.
80  //--------------------------------------------------------------------------
81 
82  virtual ~TSPI5_P015_27_V1_0_CB();
83 
84  //!-------------------------------------------------------------------------
85  //! @brief PIO initialisation method
86  //! @note None
87  //! @return None
88  //! \par Override
89  //! Not allowed
90  //! @attention None
91  //--------------------------------------------------------------------------
92 
93  virtual VOID PIO_Init();
94 
95  //!-------------------------------------------------------------------------
96  //! @brief PIO reinitialisation as GPIO method
97  //! @note None
98  //! @return None
99  //! \par Override
100  //! Not allowed
101  //! @attention None
102  //--------------------------------------------------------------------------
103 
104  virtual VOID PIO_Done();
105 
106  //!-------------------------------------------------------------------------
107  //! @brief Activate (set to 0) SPI bus chip select signal
108  //! @note None
109  //! @return None
110  //! \par Override
111  //! Not allowed
112  //! @attention None
113  //--------------------------------------------------------------------------
114 
115  virtual VOID CS_Activate();
116 
117  //!-------------------------------------------------------------------------
118  //! @brief Deactivate (set to 1) SPI bus chip select signal
119  //! @note None
120  //! @return None
121  //! \par Override
122  //! Not allowed
123  //! @attention None
124  //--------------------------------------------------------------------------
125 
126  virtual VOID CS_Deactivate();
127 
128  //----------------------------------------------------------------------------
129  // Protected defines, methods and variables
130  //----------------------------------------------------------------------------
131 
132  protected:
133 
134  //----------------------------------------------------------------------------
135  // Private defines, methods and variables
136  //----------------------------------------------------------------------------
137 
138  private:
139 
140 };
141 
142 //------------------------------------------------------------------------------
143 // End Of File
144 //------------------------------------------------------------------------------
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
STM32F429 on-chip SPI5 bus master module class header file.
On chip SPI5 bus master unit class.
Definition: SPI5_P015_27_V1_0_CB.h:56
TSPI5_P015_27_V1_0_CB()
Class constructor method.
Definition: SPI5_P015_27_V1_0_CB.cpp:70
virtual VOID PIO_Init()
PIO initialisation method.
Definition: SPI5_P015_27_V1_0_CB.cpp:86
virtual VOID CS_Deactivate()
Deactivate (set to 1) SPI bus chip select signal.
Definition: SPI5_P015_27_V1_0_CB.cpp:183
virtual VOID CS_Activate()
Activate (set to 0) SPI bus chip select signal.
Definition: SPI5_P015_27_V1_0_CB.cpp:166
virtual VOID PIO_Done()
PIO reinitialisation as GPIO method.
Definition: SPI5_P015_27_V1_0_CB.cpp:138
virtual ~TSPI5_P015_27_V1_0_CB()
Class destructor method.
Definition: SPI5_P015_27_V1_0_CB.cpp:78
STM32F429 on-chip SPI5 bus master module class.
Definition: SPI5_STM32F429.h:54