ConOpSys V2970  P004.07
ANVILEX control operating system
PWM_3P3L.h
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1 //------------------------------------------------------------------------------
2 //! @file PWM_3P3L.h
3 //! @author ANVILEX GmbH
4 //! @version V1.0
5 //! @date 03.05.2015
6 //! @brief 3-phase 3-level pulse width modulator object header file.
7 //! @attention
8 //!
9 //! COPYRIGHT(C) 2015 ANVILEX GmbH
10 //!
11 //! Redistribution and use in source and binary forms, with or without
12 //! modification, are permitted provided that the following conditions are met:
13 //!
14 //! 1. Redistributions of source code must retain the above copyright notice,
15 //! this list of conditions and the following disclaimer.
16 //!
17 //! 2. Redistributions in binary form must reproduce the above copyright notice,
18 //! this list of conditions and the following disclaimer in the documentation
19 //! and/or other materials provided with the distribution.
20 //!
21 //! 3. Neither the name of ANVILEX nor the names of its contributors may be
22 //! used to endorse or promote products derived from this software without
23 //! specific prior written permission.
24 //!
25 //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 //! POSSIBILITY OF SUCH DAMAGE.
36 //------------------------------------------------------------------------------
37 
38 //------------------------------------------------------------------------------
39 // Protecting header files from mutual, recursive inclusion.
40 //------------------------------------------------------------------------------
41 
42 #pragma once
43 
44 //------------------------------------------------------------------------------
45 // Include standard libraries header files
46 //------------------------------------------------------------------------------
47 
48 //------------------------------------------------------------------------------
49 // Include thrid party header files
50 //------------------------------------------------------------------------------
51 
52 //------------------------------------------------------------------------------
53 // Include ConOpSys header files
54 //------------------------------------------------------------------------------
55 
56 #include "Function_Block_Base.h"
57 
58 //------------------------------------------------------------------------------
59 // Include ConOpSys application header files
60 //------------------------------------------------------------------------------
61 
62 //------------------------------------------------------------------------------
63 // Macros
64 //------------------------------------------------------------------------------
65 
66 //------------------------------------------------------------------------------
67 //! @brief 3-phase 3-level pulse width modulator object class
68 //------------------------------------------------------------------------------
69 
71 {
72 
73  //----------------------------------------------------------------------------
74  // Public defines, methods and variables
75  //----------------------------------------------------------------------------
76 
77  public:
78 
79  // Register structure for generic access
80  typedef struct
81  {
82 
83  union
84  {
85  U16 u16_Control; //!< PWM module control register
86  U16 u16_Status; //!< PWM module status register
87  };
88 
89  U16 u16_Half_Periode; //!< Half PWM periode register
90  U16 u16_Dead_Time; //!< Dead time register
91 
93 
94  I16 i16_Setpoint_L1_1; //!< Set point 1 of the phase 1
95  I16 i16_Setpoint_L1_2; //!< Set point 2 of the phase 1
96  I16 i16_Setpoint_L2_1; //!< Set point 1 of the phase 2
97  I16 i16_Setpoint_L2_2; //!< Set point 2 of the phase 2
98  I16 i16_Setpoint_L3_1; //!< Set point 1 of the phase 3
99  I16 i16_Setpoint_L3_2; //!< Set point 2 of the phase 3
100 
101  // PWM Setpoint registers
102 /*
103  // ANVILEX: To remove
104  U16 i16_Setpoint_P1_T1; //!< Setpoint for phase 1 switch T1
105  U16 i16_Setpoint_P1_T2; //!< Setpoint for phase 1 switch T2
106  U16 i16_Setpoint_P1_T3; //!< Setpoint for phase 1 switch T3
107  U16 i16_Setpoint_P1_T4; //!< Setpoint for phase 1 switch T4
108 
109  U16 i16_Setpoint_P2_T1; //!< Setpoint for phase 2 switch T1
110  U16 i16_Setpoint_P2_T2; //!< Setpoint for phase 2 switch T2
111  U16 i16_Setpoint_P2_T3; //!< Setpoint for phase 2 switch T3
112  U16 i16_Setpoint_P2_T4; //!< Setpoint for phase 2 switch T4
113 
114  U16 i16_Setpoint_P3_T1; //!< Setpoint for phase 3 switch T1
115  U16 i16_Setpoint_P3_T2; //!< Setpoint for phase 3 switch T2
116  U16 i16_Setpoint_P3_T3; //!< Setpoint for phase 3 switch T3
117  U16 i16_Setpoint_P3_T4; //!< Setpoint for phase 3 switch T4
118 */
119 
121 
122  //--------------------------------------------------------------------------
123  // Public methods
124  //--------------------------------------------------------------------------
125 
126  //!-------------------------------------------------------------------------
127  //! @brief Class constructor method.
128  //! @note None
129  //! \par Override
130  //! Not allowed
131  //! @attention Don't call this method directly.
132  //--------------------------------------------------------------------------
133 
134  TPWM_3P3L();
135 
136  //!-------------------------------------------------------------------------
137  //! @brief Class destructor method.
138  //! @note None
139  //! \par Override
140  //! Not allowed
141  //! @attention Don't call this method directly.
142  //--------------------------------------------------------------------------
143 
144  virtual ~TPWM_3P3L();
145 
146  //!-------------------------------------------------------------------------
147  //! @brief 3-phase 3-level pulse width modulator memory mapping.
148  //! @note None
149  //! @param [in] struct_Registers_Base_Address Base address within FPGA address space
150  //! @return None
151  //! \par Override
152  //! Not allowed
153  //! @attention None
154  //--------------------------------------------------------------------------
155 
156  VOID Map( TPWM_3P3L_Registers *struct_Registers_Base_Address );
157 
158  //!-------------------------------------------------------------------------
159  //! @brief Function block initialisation method.
160  //! @note None
161  //! \par Override
162  //! Not allowed
163  //! @attention Don't call this method directly.
164  //--------------------------------------------------------------------------
165 
166  virtual VOID Init();
167 
168  //!-------------------------------------------------------------------------
169  //! @brief Function block execution method.
170  //! @note None
171  //! \par Override
172  //! Not allowed
173  //! @attention None
174  //--------------------------------------------------------------------------
175 
176  virtual VOID Execute();
177 
178  //--------------------------------------------------------------------------
179  // Public variables
180  //--------------------------------------------------------------------------
181 
182  // Inputs
183  F32 *f32_Magnitude; // [-] Magnitude of the voltage vector
184  F32 *f32_Angle; // [rad] Angle of the voltage vector
185  F32 *f32_Output_Power; // [?] Output power (requered for correct d.c. bus balancing)
186 
189 
190  F32 *f32_Output_Current_L1; // [-] Output current phase L1
191  F32 *f32_Output_Current_L2; // [-] Output current phase L2
192  F32 *f32_Output_Current_L3; // [-] Output current phase L3
193 
195 
196 // U16 *u16_Half_Period;
197 // U16 *u16_Dead_Time;
198 
199  // Outputs
206 
209 
211 
214 
215  //----------------------------------------------------------------------------
216  // Public defines, methods and variables
217  //----------------------------------------------------------------------------
218 
219  protected:
220 
221  //----------------------------------------------------------------------------
222  // Public defines, methods and variables
223  //----------------------------------------------------------------------------
224 
225  private:
226 
227  //! @brief FPGA mapped registers
229 
230 };
231 
232 //------------------------------------------------------------------------------
233 // Export references to the objects
234 //------------------------------------------------------------------------------
235 
236 //------------------------------------------------------------------------------
237 // Export references to the functions
238 //------------------------------------------------------------------------------
239 
240 //------------------------------------------------------------------------------
241 // End Of File
242 //------------------------------------------------------------------------------
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
float F32
IEEE-754 32-Bit single presession floating point numbers datatype defenition.
Definition: Defines.h:324
short I16
2s Compliment 16-Bit signed integer datatype defenition
Definition: Defines.h:196
unsigned short U16
Binary 16-Bit unsigned integer datatype defenition.
Definition: Defines.h:193
Function block base class header file.
Function block base class for device.
Definition: Function_Block_Base.h:96
3-phase 3-level pulse width modulator object class
Definition: PWM_3P3L.h:71
VOID Map(TPWM_3P3L_Registers *struct_Registers_Base_Address)
3-phase 3-level pulse width modulator memory mapping.
Definition: PWM_3P3L.cpp:99
TPWM_3P3L()
Class constructor method.
Definition: PWM_3P3L.cpp:68
F32 f32_Duty_L3_Bottom
Definition: PWM_3P3L.h:205
F32 f32_Duty_L1_Bottom
Definition: PWM_3P3L.h:201
F32 f32_Switching_Frequency
Definition: PWM_3P3L.h:208
F32 * f32_Output_Current_L2
Definition: PWM_3P3L.h:191
F32 f32_Duty_L2_Bottom
Definition: PWM_3P3L.h:203
virtual VOID Init()
Function block initialisation method.
Definition: PWM_3P3L.cpp:111
F32 * f32_Maximum_Modulation_Factor
Definition: PWM_3P3L.h:194
F32 f32_Sample_Time
Definition: PWM_3P3L.h:210
virtual ~TPWM_3P3L()
Class destructor method.
Definition: PWM_3P3L.cpp:91
F32 * f32_Output_Current_L3
Definition: PWM_3P3L.h:192
F32 f32_Duty_L2_Top
Definition: PWM_3P3L.h:202
F32 * f32_Angle
Definition: PWM_3P3L.h:184
TPWM_3P3L_Registers * struct_Registers
FPGA mapped registers.
Definition: PWM_3P3L.h:228
F32 * f32_Output_Power
Definition: PWM_3P3L.h:185
F32 * f32_DC_Voltage_Top
Definition: PWM_3P3L.h:187
F32 * f32_DC_Voltage_Bottom
Definition: PWM_3P3L.h:188
F32 f32_Clock_Frequency
Definition: PWM_3P3L.h:207
F32 * f32_Output_Current_L1
Definition: PWM_3P3L.h:190
F32 f32_Duty_L3_Top
Definition: PWM_3P3L.h:204
U16 u16_Period
Definition: PWM_3P3L.h:212
F32 * f32_Magnitude
Definition: PWM_3P3L.h:183
virtual VOID Execute()
Function block execution method.
Definition: PWM_3P3L.cpp:131
U16 u16_Half_Period
Definition: PWM_3P3L.h:213
F32 f32_Duty_L1_Top
Definition: PWM_3P3L.h:200
Definition: PWM_3P3L.h:81
I16 i16_Setpoint_L1_2
Set point 2 of the phase 1.
Definition: PWM_3P3L.h:95
U16 u16_Reserve
Definition: PWM_3P3L.h:92
I16 i16_Setpoint_L2_2
Set point 2 of the phase 2.
Definition: PWM_3P3L.h:97
U16 u16_Half_Periode
Half PWM periode register.
Definition: PWM_3P3L.h:89
U16 u16_Status
PWM module status register.
Definition: PWM_3P3L.h:86
I16 i16_Setpoint_L3_2
Set point 2 of the phase 3.
Definition: PWM_3P3L.h:99
U16 u16_Dead_Time
Dead time register.
Definition: PWM_3P3L.h:90
I16 i16_Setpoint_L3_1
Set point 1 of the phase 3.
Definition: PWM_3P3L.h:98
I16 i16_Setpoint_L1_1
Set point 1 of the phase 1.
Definition: PWM_3P3L.h:94
I16 i16_Setpoint_L2_1
Set point 1 of the phase 2.
Definition: PWM_3P3L.h:96
U16 u16_Control
PWM module control register.
Definition: PWM_3P3L.h:85