ConOpSys V2970  P004.07
ANVILEX control operating system
PWM_1C3P2L.h
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1 //------------------------------------------------------------------------------
2 //! @file PWM_1C3P2L.h
3 //! @author ANVILEX GmbH
4 //! @version V1.0
5 //! @date 03.05.2016
6 //! @brief Single channel 3-phase 2-level pulse width modulator object header file.
7 //! @attention
8 //!
9 //! COPYRIGHT(C) 2015-2017 ANVILEX GmbH
10 //!
11 //! Redistribution and use in source and binary forms, with or without
12 //! modification, are permitted provided that the following conditions are met:
13 //!
14 //! 1. Redistributions of source code must retain the above copyright notice,
15 //! this list of conditions and the following disclaimer.
16 //!
17 //! 2. Redistributions in binary form must reproduce the above copyright notice,
18 //! this list of conditions and the following disclaimer in the documentation
19 //! and/or other materials provided with the distribution.
20 //!
21 //! 3. Neither the name of ANVILEX nor the names of its contributors may be
22 //! used to endorse or promote products derived from this software without
23 //! specific prior written permission.
24 //!
25 //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 //! POSSIBILITY OF SUCH DAMAGE.
36 //------------------------------------------------------------------------------
37 
38 //------------------------------------------------------------------------------
39 // Protecting header files from mutual, recursive inclusion.
40 //------------------------------------------------------------------------------
41 
42 #pragma once
43 
44 //------------------------------------------------------------------------------
45 // Include standard libraries header files
46 //------------------------------------------------------------------------------
47 
48 //------------------------------------------------------------------------------
49 // Include thrid party header files
50 //------------------------------------------------------------------------------
51 
52 //------------------------------------------------------------------------------
53 // Include ConOpSys header files
54 //------------------------------------------------------------------------------
55 
56 #include "Application_Resource_Configuration.h"
57 #include "Function_Block_Base.h"
58 
59 //------------------------------------------------------------------------------
60 // Include ConOpSys application header files
61 //------------------------------------------------------------------------------
62 
63 //------------------------------------------------------------------------------
64 // Check requered includes
65 //------------------------------------------------------------------------------
66 /*
67 #ifndef __APPLICATION_RESOURCE_CONFIGURATION_H
68 #error "System resourse configuration file not included."
69 #endif
70 */
71 //------------------------------------------------------------------------------
72 // Macros
73 //------------------------------------------------------------------------------
74 
75 //! @brief Single channel 3-phase 2-level pulse width modulator object class
77 {
78 
79  //----------------------------------------------------------------------------
80  // Public defines, methods and variables
81  //----------------------------------------------------------------------------
82 
83  public:
84 
85  // Register structure for generic access
86  typedef struct
87  {
88 
89  // Control and status registars
90  union
91  {
92  U16 u16_Control; //!< Offset 0x00, Twin PWM module control register
93  U16 u16_Status; //!< Offset 0x00, Twin PWM module status register
94  };
95 
96  // Configuration registers
97  U16 u16_Half_Periode; //!< Offset 0x01, Half PWM periode register
98  U16 u16_Dead_Time_Inverter; //!< Offset 0x02, Dead time register of the inverter 1
99  U16 u16_Reserve_3; //!< Offset 0x03, Not used
100 
101  // Inverter 1 PWM setpoint registers
102  I16 i16_Setpoint_Inverter_L1; //!< Offset 0x04, Set point of the inverter 1 leg 1
103  I16 i16_Setpoint_Inverter_L2; //!< Offset 0x05, Set point of the inverter 1 leg 2
104  I16 i16_Setpoint_Inverter_L3; //!< Offset 0x06, Set point of the inverter 1 leg 3
105  U16 u16_Reserve_7; //!< Offset 0x07, Not used
106 
107  // Inverter 2 PWM Setpoint registers
108  U16 u16_Reserve_8; //!< Offset 0x08, Not used
109  U16 u16_Reserve_9; //!< Offset 0x09, Not used
110  U16 u16_Reserve_A; //!< Offset 0x0A, Not used
111  U16 u16_Reserve_B; //!< Offset 0x0B, Not used
112 
113  // Reserved registers
114  U16 u16_Reserve_C; //!< Offset 0x0C, Not used
115  U16 u16_Reserve_D; //!< Offset 0x0D, Not used
116  U16 u16_Reserve_E; //!< Offset 0x0E, Not used
117  U16 u16_Reserve_F; //!< Offset 0x0F, Not used
118 
120 
121  //--------------------------------------------------------------------------
122  // Public methods
123  //--------------------------------------------------------------------------
124 
125 
126  TPWM_1C3P2L(); //!< Constructor
127 
128  //!-------------------------------------------------------------------------
129  //! @brief Class destructor method.
130  //! @note None
131  //! \par Override
132  //! Not allowed
133  //! @attention Don't call this method directly.
134  //--------------------------------------------------------------------------
135 
136  virtual ~TPWM_1C3P2L();
137 
138  VOID Map( TPWM_1C3P2L_Registers *struct_Registers_Base_Address ); //!< Hardware mapping method
139 
140  //!-------------------------------------------------------------------------
141  //! @brief Function block initialisation method.
142  //! @note None
143  //! \par Override
144  //! Not allowed
145  //! @attention Don't call this method directly.
146  //--------------------------------------------------------------------------
147 
148  virtual VOID Init();
149 
150  //!-------------------------------------------------------------------------
151  //! @brief Function block execution method.
152  //! @note None
153  //! \par Override
154  //! Not allowed
155  //! @attention None
156  //--------------------------------------------------------------------------
157 
158  virtual VOID Execute();
159 
160  //!-------------------------------------------------------------------------
161  //! @brief Send information about Function block over communication link protocol
162  //! @note This method sends information about Function block over specified communication link protocol.
163  //! @param [in] *object_Protocol - Pointer to the communication link protocol
164  //! @return None
165  //! \par Override
166  //! Not allowed
167  //! @attention None
168  //--------------------------------------------------------------------------
169 
170  virtual VOID Send_Information( TProtocol_Base *object_Protocol );
171 
172  //--------------------------------------------------------------------------
173  // Public variables
174  //--------------------------------------------------------------------------
175 
176  // Parameters
177 
179 
180  // Inputs
181 
183 
187 
189 
190  // Outputs
191 
192  TBlock_Output_Connector object_f32_Sample_Time; // [s] Control event sample time
193 
194  //--------------------------------------------------------------------------
195  // Diagnose outputs
196  //--------------------------------------------------------------------------
197 
198  #ifdef FUNCTIONAL_BLOCK_CREATE_DIAGNOSE_OUTPUTS
199 
200  F32 f32_K;
201 
202  F32 f32_Inverter_Phase_L1_Time;
203  F32 f32_Inverter_Phase_L2_Time;
204  F32 f32_Inverter_Phase_L3_Time;
205 
206  F32 f32_Inverter_Minimum_Time;
207  F32 f32_Inverter_Maximum_Time;
208 
209  F32 f32_Inverter_Offset;
210 
211  I32 i32_Inverter_Phase_L1_Setpoint;
212  I32 i32_Inverter_Phase_L2_Setpoint;
213  I32 i32_Inverter_Phase_L3_Setpoint;
214 
215  U16 u16_Control;
216 
217  #endif
218 
219  //----------------------------------------------------------------------------
220  // Protected defines, methods and variables
221  //----------------------------------------------------------------------------
222 
223  protected:
224 
225  //----------------------------------------------------------------------------
226  // Private defines, methods and variables
227  //----------------------------------------------------------------------------
228 
229  private:
230 
231  //! @brief FPGA mapped registers
233 
234  //! @brief [Hz] FPGA system clock
236 
237  //! @brief [Counts] Periode in counts
239 
240  //! @brief [Counts] Half periode in counts
242 
243  //! @brief [Counts] Quarter periode
245 
246  //! @brief Inverter 1 deadtime in FPGA clock counts
248 
249 };
250 
251 //------------------------------------------------------------------------------
252 // End Of File
253 //------------------------------------------------------------------------------
long I32
2s Compliment 32-Bit signed integer datatype defenition
Definition: Defines.h:206
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
float F32
IEEE-754 32-Bit single presession floating point numbers datatype defenition.
Definition: Defines.h:324
short I16
2s Compliment 16-Bit signed integer datatype defenition
Definition: Defines.h:196
unsigned short U16
Binary 16-Bit unsigned integer datatype defenition.
Definition: Defines.h:193
Function block base class header file.
Function block input connector class.
Definition: Block_Input_Connector.h:83
Function block output connector class.
Definition: Block_Output_Connector.h:59
Function block base class for device.
Definition: Function_Block_Base.h:96
Single channel 3-phase 2-level pulse width modulator object class.
Definition: PWM_1C3P2L.h:77
TBlock_Input_Connector object_f32_Inverter_Phase_L2_Voltage
Definition: PWM_1C3P2L.h:185
virtual VOID Init()
Function block initialisation method.
Definition: PWM_1C3P2L.cpp:133
TBlock_Output_Connector object_f32_Sample_Time
Definition: PWM_1C3P2L.h:192
virtual ~TPWM_1C3P2L()
Class destructor method.
Definition: PWM_1C3P2L.cpp:113
U16 u16_Inverter_1_Deadtime
Inverter 1 deadtime in FPGA clock counts.
Definition: PWM_1C3P2L.h:247
U16 u16_Half_Periode
[Counts] Half periode in counts
Definition: PWM_1C3P2L.h:241
virtual VOID Execute()
Function block execution method.
Definition: PWM_1C3P2L.cpp:176
virtual VOID Send_Information(TProtocol_Base *object_Protocol)
Send information about Function block over communication link protocol.
Definition: PWM_1C3P2L.cpp:311
U16 u16_Quarter_Periode
[Counts] Quarter periode
Definition: PWM_1C3P2L.h:244
TPWM_1C3P2L_Registers * struct_Registers
FPGA mapped registers.
Definition: PWM_1C3P2L.h:232
TBlock_Input_Connector object_f32_DC_Bus_Voltage
Definition: PWM_1C3P2L.h:188
VOID Map(TPWM_1C3P2L_Registers *struct_Registers_Base_Address)
Hardware mapping method.
Definition: PWM_1C3P2L.cpp:121
TBlock_Input_Connector object_f32_Inverter_Phase_L1_Voltage
Definition: PWM_1C3P2L.h:184
TBlock_Input_Connector object_f32_Switching_Frequency
Definition: PWM_1C3P2L.h:178
U16 u16_Periode
[Counts] Periode in counts
Definition: PWM_1C3P2L.h:238
TBlock_Input_Connector object_f32_Inverter_Phase_L3_Voltage
Definition: PWM_1C3P2L.h:186
TBlock_Input_Connector object_bool_Enable_Inverter
Definition: PWM_1C3P2L.h:182
TPWM_1C3P2L()
Constructor.
Definition: PWM_1C3P2L.cpp:68
F32 f32_Clock_Frequency
[Hz] FPGA system clock
Definition: PWM_1C3P2L.h:235
Definition: Protocol_Base.h:57
Definition: PWM_1C3P2L.h:87
U16 u16_Reserve_F
Offset 0x0F, Not used.
Definition: PWM_1C3P2L.h:117
U16 u16_Reserve_3
Offset 0x03, Not used.
Definition: PWM_1C3P2L.h:99
I16 i16_Setpoint_Inverter_L3
Offset 0x06, Set point of the inverter 1 leg 3.
Definition: PWM_1C3P2L.h:104
U16 u16_Reserve_A
Offset 0x0A, Not used.
Definition: PWM_1C3P2L.h:110
U16 u16_Reserve_8
Offset 0x08, Not used.
Definition: PWM_1C3P2L.h:108
U16 u16_Half_Periode
Offset 0x01, Half PWM periode register.
Definition: PWM_1C3P2L.h:97
I16 i16_Setpoint_Inverter_L1
Offset 0x04, Set point of the inverter 1 leg 1.
Definition: PWM_1C3P2L.h:102
U16 u16_Dead_Time_Inverter
Offset 0x02, Dead time register of the inverter 1.
Definition: PWM_1C3P2L.h:98
U16 u16_Reserve_7
Offset 0x07, Not used.
Definition: PWM_1C3P2L.h:105
U16 u16_Control
Offset 0x00, Twin PWM module control register.
Definition: PWM_1C3P2L.h:92
U16 u16_Reserve_C
Offset 0x0C, Not used.
Definition: PWM_1C3P2L.h:114
U16 u16_Reserve_9
Offset 0x09, Not used.
Definition: PWM_1C3P2L.h:109
I16 i16_Setpoint_Inverter_L2
Offset 0x05, Set point of the inverter 1 leg 2.
Definition: PWM_1C3P2L.h:103
U16 u16_Reserve_D
Offset 0x0D, Not used.
Definition: PWM_1C3P2L.h:115
U16 u16_Reserve_E
Offset 0x0E, Not used.
Definition: PWM_1C3P2L.h:116
U16 u16_Status
Offset 0x00, Twin PWM module status register.
Definition: PWM_1C3P2L.h:93
U16 u16_Reserve_B
Offset 0x0B, Not used.
Definition: PWM_1C3P2L.h:111