ConOpSys V2970  P004.07
ANVILEX control operating system
FPGA_P015_09_CB.h
Go to the documentation of this file.
1 //------------------------------------------------------------------------------
2 //! @file FPGA_P015_09_CB.h
3 //! @brief Control board P015.09 CB FPGA hardware driver header file.
4 //! @attention No special attention requered.
5 //! @copyright (C) 2015-2020 ANVILEX LLC
6 //! $HeadURL: https://192.168.3.4:8443/svn/P004_07/ConOpSys/Hardware/P015_09_V1_0/FPGA_P015_09_CB.h $
7 //! $Revision: 2268 $
8 //! $Date: 2020-12-06 14:59:59 +0500 (So, 06 Dez 2020) $
9 //! $Author: minch $
10 //------------------------------------------------------------------------------
11 //
12 // Redistribution and use in source and binary forms, with or without
13 // modification, are permitted provided that the following conditions are met:
14 //
15 // 1. Redistributions of source code must retain the above copyright notice,
16 // this list of conditions and the following disclaimer.
17 //
18 // 2. Redistributions in binary form must reproduce the above copyright notice,
19 // this list of conditions and the following disclaimer in the documentation
20 // and/or other materials provided with the distribution.
21 //
22 // 3. Neither the name of ANVILEX nor the names of its contributors may be
23 // used to endorse or promote products derived from this software without
24 // specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
30 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 // POSSIBILITY OF SUCH DAMAGE.
37 //
38 //------------------------------------------------------------------------------
39 
40 //------------------------------------------------------------------------------
41 // Protecting header files from mutual, recursive inclusion.
42 //------------------------------------------------------------------------------
43 
44 #pragma once
45 
46 //------------------------------------------------------------------------------
47 // Include standard libraries header files
48 //------------------------------------------------------------------------------
49 
50 //------------------------------------------------------------------------------
51 // Include thrid party header files
52 //------------------------------------------------------------------------------
53 
54 //------------------------------------------------------------------------------
55 // Include ConOpSys header files
56 //------------------------------------------------------------------------------
57 
58 #include "FPGA_Base.h"
59 
60 //------------------------------------------------------------------------------
61 // Include ConOpSys application header files
62 //------------------------------------------------------------------------------
63 
64 //------------------------------------------------------------------------------
65 // Global defines
66 //------------------------------------------------------------------------------
67 
68 //------------------------------------------------------------------------------
69 // Global macros
70 //------------------------------------------------------------------------------
71 
72 //------------------------------------------------------------------------------
73 // Class declaration
74 //------------------------------------------------------------------------------
75 
76 //! @brief FPGA hardware dependent driver class for P015_09_CB
78 {
79 
80  //----------------------------------------------------------------------------
81  // Public defines, methods and variables
82  //----------------------------------------------------------------------------
83 
84  public:
85 
86  //!-------------------------------------------------------------------------
87  //! @brief FPGA base class constructor method.
88  //! @note None
89  //! \par Override
90  //! Not allowed
91  //! @attention Don't call this method directly.
92  //--------------------------------------------------------------------------
93 
95 
96  //!-------------------------------------------------------------------------
97  //! @brief FPGA base class destructor method.
98  //! @note None
99  //! \par Override
100  //! Not allowed
101  //! @attention Don't call this method directly.
102  //--------------------------------------------------------------------------
103 
104  virtual ~TFPGA_P015_09_CB();
105 
106  //!-------------------------------------------------------------------------
107  //! @brief FPGA interrupt processing method.
108  //! @note None
109  //! @return None
110  //! \par Override
111  //! Not allowed
112  //! @attention Don't call this method directly.
113  //--------------------------------------------------------------------------
114 
115  VOID Interrupt();
116 
117  //!-------------------------------------------------------------------------
118  //! @brief Configure FPGA method.
119  //! @note None
120  //! @return BOOL - Return FPGA present status
121  //! @retval false - Load FPGA configuration failed
122  //! @retval true - Load FPGA configuration sucessed
123  //! \par Override
124  //! Not allowed
125  //! @attention None
126  //--------------------------------------------------------------------------
127 
128  virtual BOOL Configure();
129 
130  //!-------------------------------------------------------------------------
131  //! @brief Enable FPGA interrupt method.
132  //! @note None
133  //! @param [in] u32_TickPriority - Priority
134  //! @return None
135  //! \par Override
136  //! Not allowed
137  //! @attention None
138  //--------------------------------------------------------------------------
139 
140  virtual VOID Interrupt_Enable( U32 u32_TickPriority );
141 
142  //!-------------------------------------------------------------------------
143  //! @brief Disable FPGA interrupt method.
144  //! @note None
145  //! @return None
146  //! \par Override
147  //! Not allowed
148  //! @attention None
149  //--------------------------------------------------------------------------
150 
151  virtual VOID Interrupt_Disable();
152 
153  //!-------------------------------------------------------------------------
154  //! @brief Get FPGA PROG pin status method.
155  //! @note None
156  //! @return BOOL - Return FPGA PROG pin status
157  //! @retval false - FPGA PROG pin is low
158  //! @retval true - FPGA PROG pin is high
159  //! \par Override
160  //! Not allowed
161  //! @attention None
162  //--------------------------------------------------------------------------
163 
164  virtual BOOL FPGA_PROG_Pin_Status();
165 
166  //!-------------------------------------------------------------------------
167  //! @brief Get FPGA DONE pin status method.
168  //! @note None
169  //! @return BOOL - Return FPGA DONE pin status
170  //! @retval false - FPGA DONE pin is low
171  //! @retval true - FPGA DONE pin is high
172  //! \par Override
173  //! Not allowed
174  //! @attention None
175  //--------------------------------------------------------------------------
176 
177  virtual BOOL FPGA_DONE_Pin_Status();
178 
179  //!-------------------------------------------------------------------------
180  //! @brief Send boot ststus information message about FPGA driver over communication link protocol
181  //! @note This method sends boot ststus information about FPGA driver over specified communication link protocol.
182  //! @param [in] *object_Protocol - Pointer to the communication link protocol
183  //! @return None
184  //! \par Override
185  //! Not allowed
186  //! @attention None
187  //--------------------------------------------------------------------------
188 
189  virtual VOID Send_Boot_Information( TProtocol_Base *object_Protocol );
190 
191  //----------------------------------------------------------------------------
192  // Protected defines, methods and variables
193  //----------------------------------------------------------------------------
194 
195  protected:
196 
197  //----------------------------------------------------------------------------
198  // Private defines, methods and variables
199  //----------------------------------------------------------------------------
200 
201  private:
202 
203 };
204 
205 //------------------------------------------------------------------------------
206 // End of file
207 //------------------------------------------------------------------------------
208 
int BOOL
Boolean datatype definition.
Definition: Defines.h:124
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
unsigned long U32
Binary 32-Bit unsigned integer datatype defenition.
Definition: Defines.h:203
FPGA chip base class implementation file.
FPGA base class.
Definition: FPGA_Base.h:81
FPGA hardware dependent driver class for P015_09_CB.
Definition: FPGA_P015_09_CB.h:78
virtual VOID Interrupt_Disable()
Disable FPGA interrupt method.
Definition: FPGA_P015_09_CB.cpp:1114
virtual BOOL Configure()
Configure FPGA method.
Definition: FPGA_P015_09_CB.cpp:133
virtual BOOL FPGA_PROG_Pin_Status()
Get FPGA PROG pin status method.
Definition: FPGA_P015_09_CB.cpp:1040
virtual BOOL FPGA_DONE_Pin_Status()
Get FPGA DONE pin status method.
Definition: FPGA_P015_09_CB.cpp:1052
VOID Interrupt()
FPGA interrupt processing method.
Definition: FPGA_P015_09_CB.cpp:118
virtual VOID Interrupt_Enable(U32 u32_TickPriority)
Enable FPGA interrupt method.
Definition: FPGA_P015_09_CB.cpp:1100
TFPGA_P015_09_CB()
FPGA base class constructor method.
Definition: FPGA_P015_09_CB.cpp:102
virtual VOID Send_Boot_Information(TProtocol_Base *object_Protocol)
Send boot ststus information message about FPGA driver over communication link protocol.
Definition: FPGA_P015_09_CB.cpp:1064
virtual ~TFPGA_P015_09_CB()
FPGA base class destructor method.
Definition: FPGA_P015_09_CB.cpp:110
Definition: Protocol_Base.h:57