ConOpSys V2970  P004.07
ANVILEX control operating system
FPGA_Driver.h
Go to the documentation of this file.
1 //------------------------------------------------------------------------------
2 //! @file FPGA_Driver.h
3 //! @brief FPGA driver chip calss header file.
4 //! @attention No special attention requered.
5 //! @copyright (C) 2015-2020 ANVILEX LLC
6 //! $HeadURL: https://192.168.3.4:8443/svn/P004_07/ConOpSys/Peripherals/FPGA/FPGA_Driver.h $
7 //! $Revision: 2262 $
8 //! $Date: 2020-12-05 07:20:48 +0500 (Sa, 05 Dez 2020) $
9 //! $Author: minch $
10 //------------------------------------------------------------------------------
11 //
12 // Redistribution and use in source and binary forms, with or without
13 // modification, are permitted provided that the following conditions are met:
14 //
15 // 1. Redistributions of source code must retain the above copyright notice,
16 // this list of conditions and the following disclaimer.
17 //
18 // 2. Redistributions in binary form must reproduce the above copyright notice,
19 // this list of conditions and the following disclaimer in the documentation
20 // and/or other materials provided with the distribution.
21 //
22 // 3. Neither the name of ANVILEX nor the names of its contributors may be
23 // used to endorse or promote products derived from this software without
24 // specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
30 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 // POSSIBILITY OF SUCH DAMAGE.
37 //
38 //------------------------------------------------------------------------------
39 
40 //------------------------------------------------------------------------------
41 // Protecting header files from mutual, recursive inclusion.
42 //------------------------------------------------------------------------------
43 
44 #pragma once
45 
46 //------------------------------------------------------------------------------
47 // Include standard libraries header files
48 //------------------------------------------------------------------------------
49 
50 //------------------------------------------------------------------------------
51 // Include thrid party header files
52 //------------------------------------------------------------------------------
53 
54 //------------------------------------------------------------------------------
55 // Include ConOpSys header files
56 //------------------------------------------------------------------------------
57 
58 #include "FPGA_Base.h"
59 
60 //------------------------------------------------------------------------------
61 // Include ConOpSys application header files
62 //------------------------------------------------------------------------------
63 
64 //------------------------------------------------------------------------------
65 // Global defines
66 //------------------------------------------------------------------------------
67 
68 //------------------------------------------------------------------------------
69 // Global macros
70 //------------------------------------------------------------------------------
71 
72 //------------------------------------------------------------------------------
73 // Class declaration
74 //------------------------------------------------------------------------------
75 
76 //! @brief FPGA hardware dependent driver class
78 {
79 
80  //----------------------------------------------------------------------------
81  // Public defines, methods and variables
82  //----------------------------------------------------------------------------
83 
84  public:
85 
86  //--------------------------------------------------------------------------
87  // Public enumerators
88  //--------------------------------------------------------------------------
89 
90  //--------------------------------------------------------------------------
91  // Public structures
92  //--------------------------------------------------------------------------
93 
94  //!-------------------------------------------------------------------------
95  //! @brief FPGA base class constructor method.
96  //! @note None
97  //! \par Override
98  //! Not allowed
99  //! @attention Don't call this method directly.
100  //--------------------------------------------------------------------------
101 
102  TFPGA_STM32F429();
103 
104  //!-------------------------------------------------------------------------
105  //! @brief FPGA base class destructor method.
106  //! @note None
107  //! \par Override
108  //! Not allowed
109  //! @attention Don't call this method directly.
110  //--------------------------------------------------------------------------
111 
112  virtual ~TFPGA_STM32F429();
113 
114  //!-------------------------------------------------------------------------
115  //! @brief FPGA interrupt processing method.
116  //! @note None
117  //! @return None
118  //! \par Override
119  //! Not allowed
120  //! @attention Don't call this method directly.
121  //--------------------------------------------------------------------------
122 
123  VOID Interrupt();
124 
125  //!-------------------------------------------------------------------------
126  //! @brief Configure FPGA method.
127  //! @note None
128  //! @return BOOL - Return FPGA present status
129  //! @retval false - Load FPGA configuration failed
130  //! @retval true - Load FPGA configuration sucessed
131  //! \par Override
132  //! Not allowed
133  //! @attention None
134  //--------------------------------------------------------------------------
135 
136  virtual BOOL Configure();
137 
138  //!-------------------------------------------------------------------------
139  //! @brief Enable FPGA interrupt method.
140  //! @note None
141  //! @param [in] u32_TickPriority - Priority
142  //! @return None
143  //! \par Override
144  //! Not allowed
145  //! @attention None
146  //--------------------------------------------------------------------------
147 
148  virtual VOID Interrupt_Enable( U32 u32_TickPriority );
149 
150  //!-------------------------------------------------------------------------
151  //! @brief Disable FPGA interrupt method.
152  //! @note None
153  //! @return None
154  //! \par Override
155  //! Not allowed
156  //! @attention None
157  //--------------------------------------------------------------------------
158 
159  virtual VOID Interrupt_Disable();
160 
161  //!-------------------------------------------------------------------------
162  //! @brief Get FPGA PROG pin status method.
163  //! @note None
164  //! @return BOOL - Return FPGA PROG pin status
165  //! @retval false - FPGA PROG pin is low
166  //! @retval true - FPGA PROG pin is high
167  //! \par Override
168  //! Not allowed
169  //! @attention None
170  //--------------------------------------------------------------------------
171 
172  virtual BOOL FPGA_PROG_Pin_Status();
173 
174  //!-------------------------------------------------------------------------
175  //! @brief Get FPGA DONE pin status method.
176  //! @note None
177  //! @return BOOL - Return FPGA DONE pin status
178  //! @retval false - FPGA DONE pin is low
179  //! @retval true - FPGA DONE pin is high
180  //! \par Override
181  //! Not allowed
182  //! @attention None
183  //--------------------------------------------------------------------------
184 
185  virtual BOOL FPGA_DONE_Pin_Status();
186 
187  //----------------------------------------------------------------------------
188  // Protected defines, methods and variables
189  //----------------------------------------------------------------------------
190 
191  protected:
192 
193  //--------------------------------------------------------------------------
194  // Protected enumerators
195  //--------------------------------------------------------------------------
196 
197  //--------------------------------------------------------------------------
198  // Public structures
199  //--------------------------------------------------------------------------
200 
201  //--------------------------------------------------------------------------
202  // Protected variables
203  //--------------------------------------------------------------------------
204 
205  //----------------------------------------------------------------------------
206  // Private defines, methods and variables
207  //----------------------------------------------------------------------------
208 
209  private:
210 
211  //--------------------------------------------------------------------------
212  // Private enumerators
213  //--------------------------------------------------------------------------
214 
215  //--------------------------------------------------------------------------
216  // Private structures
217  //--------------------------------------------------------------------------
218 
219  //--------------------------------------------------------------------------
220  // Private variables
221  //--------------------------------------------------------------------------
222 
223 };
224 
225 //------------------------------------------------------------------------------
226 // End Of File
227 //------------------------------------------------------------------------------
228 
int BOOL
Boolean datatype definition.
Definition: Defines.h:124
void VOID
Datatypesess datatype definition.
Definition: Defines.h:105
unsigned long U32
Binary 32-Bit unsigned integer datatype defenition.
Definition: Defines.h:203
FPGA chip base class implementation file.
FPGA base class.
Definition: FPGA_Base.h:81
FPGA hardware dependent driver class.
Definition: FPGA_Driver.h:78
VOID Interrupt()
FPGA interrupt processing method.
Definition: FPGA_Driver.cpp:118
TFPGA_STM32F429()
FPGA base class constructor method.
Definition: FPGA_Driver.cpp:102
virtual VOID Interrupt_Disable()
Disable FPGA interrupt method.
Definition: FPGA_Driver.cpp:981
virtual BOOL FPGA_DONE_Pin_Status()
Get FPGA DONE pin status method.
Definition: FPGA_Driver.cpp:948
virtual BOOL Configure()
Configure FPGA method.
Definition: FPGA_Driver.cpp:134
virtual ~TFPGA_STM32F429()
FPGA base class destructor method.
Definition: FPGA_Driver.cpp:110
virtual VOID Interrupt_Enable(U32 u32_TickPriority)
Enable FPGA interrupt method.
Definition: FPGA_Driver.cpp:960
virtual BOOL FPGA_PROG_Pin_Status()
Get FPGA PROG pin status method.
Definition: FPGA_Driver.cpp:936